APAC

TSMC 2026 Japan OIP Ecosystem Workshop

TSMC foundry ecosystem forum for chip designers and EDA partners

About this event

A one-day TSMC Open Innovation Platform workshop in Tokyo. TSMC keynotes and technical talks are followed by OIP partner sessions in two tracks, Advanced Logic and 3D IC and Analog, RF and Specialty, several given jointly by an EDA or IP vendor and a chip designer such as Qualcomm, NXP or MediaTek. An ecosystem pavilion runs through the day and two TSMC-led tutorials close the programme.

Who it's for

Chip DesignersEDA & IP PartnersAnalog/RF Designers3D IC Engineers

Aimed at chip designers and the EDA, IP and design-service companies that support TSMC processes. The agenda splits partner talks into an Advanced Logic and 3D IC track and an Analog, RF and Specialty track, many of them given jointly with designers at companies such as Qualcomm, NXP and MediaTek. Less relevant to anyone outside silicon design.

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