APAC

SNUG Japan

Synopsys EDA user group (SNUG) conference

About this event

The Japanese edition of the Synopsys Users Group (SNUG) conference, a hybrid in-person and virtual event in Tokyo. Brings together semiconductor and electronic design engineers to share insights on digital and analog design, verification methodologies, multi-die systems, AI-driven chip design, silicon lifecycle management and EDA tool advancements.

Who it's for

Semiconductor/EDA EngineersChip Design Verification SpecialistsFoundry/IP PartnersAI Hardware Architects

Useful for Synopsys tool users, digital and analog design and verification engineers, and semiconductor ecosystem partners (foundries, IP vendors) in Japan. Not useful for general IT/software audiences or non-semiconductor AEC/facilities professionals, this is a deep EDA/silicon-design vertical event.

Official hashtags

Used by the organiser on X and LinkedIn. Follow along before, during and after the event.

Conference series#SNUGPosts across every edition of this conference.Search on XSearch on LinkedIn
Account@Synopsys

Speakers

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