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DVCon India 2026

Design & verification (EDA functional verification) conference (Accellera/DVCon)

About this event

The 9th edition of the Design and Verification Conference in India, expanded to three full days at the Radisson Blu Bengaluru. Covers practical application of languages, tools, methodologies and standards for IC and electronic system design and verification, including AI-driven methodologies, system-level design and hardware-software co-verification, through tutorials, technical paper sessions and poster presentations.

Who it's for

Chip Design Verification EngineersFormal Methods/EDA SpecialistsEDA Vendor ExecutivesAI-in-EDA Researchers

DVCon India is a deep technical conference for the semiconductor design and verification community, formal verification, simulation, emulation, virtual prototyping, and AI-driven EDA tooling are the core content. It is genuinely valuable for verification/design engineers, EDA tool vendors, and chip-design researchers needing hands-on technical depth and peer benchmarking. It is not particularly relevant for general software/IT audiences, PLM or manufacturing practitioners, or business/marketing roles.

Social media & coverage

“A day-by-day attendee diary covering verification moving from "closure to confidence," AI shifting from copilots to multi-agent workflows, and a semiconductor-startup panel.”

“A technical attendee summary of specific papers, including structured formal verification ("Formal OS"), AI agents for reset-abstraction decisions, and an agentic floating-point equivalence debugger called "FloatFix."”

Vijayakumar S NOpen on linkedin.com

“An organiser-adjacent reflection on three days of conversations around verification complexity, efficiency and automation.”

Signoff SemiconductorsOpen on linkedin.com

“A post-event trade-press interview with Real Intent's CEO built around his DVCon India keynote, covering microarchitecture analysis for static sign-off and claimed 20x efficiency gains over netlist-level techniques.”

Srinivasa Reddy NOpen on eeherald.com

“DVCon India 2026 promoted its 11th edition as ready to take design and verification to the next level.”

DVCon India 2026Open on LinkedIn

“DVCon India 2026 promotes the VEGA RISC-V Design & Verification Challenge, which lets participants take ideas from paper to silicon against global talent.”

DVCon India 2026's PostOpen on LinkedIn

“DVCon India marked its 10th edition as India's premier design and verification conference, held September 10 to 11 at Radisson Blu, Bangalore.”

DVCon India 2026's PostOpen on LinkedIn

Official hashtags

Used by the organiser on X and LinkedIn. Follow along before, during and after the event.

Conference series#DVConIndiaPosts across every edition of this conference.Search on XSearch on LinkedIn

Speakers

More from Accellera Systems Initiative

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